Spread spectrum techniques permit data signals to be extracted from noise with a relatively small error rate. In a spread spectrum system, a binary 1 data bit is represented by a first sequence of binary states or elements called chips, and a binary 0 data bit is represented by a second sequence of binary chips. Each sequence of binary chips is known as a spreading sequence. Typically, the second sequence of chips is the complement of the first sequence of chips. Thus, in a spread spectrum coding system, the basic unit of data, i.e., the data bit, is encoded by forming a sequence of chips. The chip rate is much higher than the data rate and each chip has a much broader frequency spectrum than a data bit. Since each chip has a frequency spectrum that is spread much wider than the frequency spectrum of the original data bit, the technique is known as spread spectrum.
At a receiver, a stream of data bits which has been transmitted using the spread spectrum format is recovered using a process known as despreading. Despreading involves correlating the received signal which comprises chips with a local reference chip sequence. The local reference utilizes the same chip sequence that was used to encode the data bits at the transmitting end. Illustratively, the reference sequence is stored at the receiver. The signal comprising the received chips is entered into a shift register and for each chip time period, the received chips are advanced one position in the shift register. At each chip time period, the number of matches between the prestored reference sequence and the received chips in the shift register is obtained.
Consider the case where the reference sequence corresponds to a binary 1 data bit and the binary 0 data bit is represented by the complement of the reference sequence. In this case, when the number of matches exceeds a predetermined upper correlation threshold, a data detection decision is made indicating the presence of a binary 1 data bit. When the number of matches falls below a predetermined lower correlation threshold, a data detection decision is made indicating the presence of a binary 0 data bit. In between the data decision times, when there are portions of two consecutive spreading sequences in the shift register (i.e. the end portion of one sequence and the beginning of the next sequence), the number of matches should fall in between the high and low thresholds, thus preventing erroneous data detection decisions.
In a noise free system, the presence of a binary 1 will be indicated by a total match between the received chips in the shift register and the reference sequence. Similarly, the presence of a binary 0 will be indicated by no matches between the received chips in the shift register and the reference sequence. However, in real systems, noise prevents all the chips in a spreading sequence from being correctly received so that binary 1 and binary 0 data detection decisions are based on whether the number of matches is above or below upper and lower predetermined correlation thresholds, respectively. This process has the effect of averaging out random noise. Thus, the despread signal component is enhanced and the noise component is reduced.
In short, in a spread spectrum communication system, at an encoder or spreader, each data bit in a data bit stream is encoded by transmitting a sequence of binary chips. Typically, one such spreading sequence is used to represent a binary 1 and its complement is used to represent a binary 0. The chips representing the data bit stream are modulated onto a carrier using a conventional two-level modulation technique such as binary phase shift keying (BPSK) or frequency shift keying (FSK) and transmitted to a decoder or a despreader. At the decoder or despreader, the chips are demodulated and correlated with a reference sequence to reconstruct the original data bit stream.
In a spread spectrum system, the transmitter and the receiver run independent clocks of nominally the same frequency. It is the local receiver clock signal which clocks the arriving chip stream through the shift register. To obtain the strongest decorrelated data bit stream signal, it is desirable that the local receiver clock be synchronized with and track the phase of the arriving chip stream signal.
Various techniques have been proposed to enable the local clock to track the phase of the arriving chip stream so as to recover the clock of the arriving chip stream. These clock recovery techniques include the use of phase locked loops or banks of correlators (see e.g. Messenger, U.S. Pat. No. 4,774,715) to select the appropriate phase of the local clock. These prior art techniques offer powerful tracking capabilities which allow the transmitting and receiving clocks to vary widely in frequency. However, if the receiver only needs to have the correct local clock for a short time, such as in the case of packet communications employing short packets, the abovementioned powerful, but complex clock-recovery techniques for the local clock are not necessary. It pays to give up the powerful tracking capabilities of the prior art clock recovery techniques which are not needed because of the finite size of the packets, and instead, simplify the clock recovery technique at the local receiver and reduce the acquisition time needed at the receiver to obtain the correct local clock.
Accordingly, it is an object of the present invention to provide a simplified clock recovery method and circuit for rapidly selecting an appropriate phase of a local receiver clock to synchronize the local clock with an arriving stream of chips in a spread spectrum communication system.
It is a further object of the present invention to provide a simplified clock recovery method and circuit for synchronizing a local clock to an arriving chip stream, which method and circuit are especially useful in connection with the receiving of short packets in a spread spectrum communication system.